Equipment and Materials for IC Manufacturing

The Global Market for Equipment and Materials for IC Manufacturing

Information Network, Date of Publication: Feb 2, 2018
US$4,995.00
TIN9570

This report examines and projects the technology of equipment and materials involved in the fabrication of VLSI semiconductor devices, their likely developments, why and when their introduction or demise will take place, what problems and choices are facing users, and where the opportunities and pitfalls are. This report discusses the technology trends, products, applications, and suppliers of chemicals (liquids and gases) and equipment (lithography, plasma etching, and CMP). It also gives insights to suppliers for future user needs and should assist them in long-range planning, new product development, and product improvement.


It addresses the strategic issues impacting both the user and supplier of chemicals and equipment and is written for:

  • Executive personnel of semiconductor manufacturing facilities
  • Strategic planners of semiconductor facilities
  • Buyers of chemicals and equipment for the semiconductor industry
  • Product planners of chemicals and equipment to the semiconductor industry
  • Chemical and equipment suppliers to the semiconductor industry
  • Investment analysts

Global Market for Equipment and Materials for IC Manufacturing
TABLE OF CONTENTS

Chapter 1 - Introduction

Chapter 2 - Low-K Dielectric Issues and Trends

2.1. Introduction
2.2. Ideal Dielectric
2.3. Types of Low-K Dielectrics
2.3.1. FSG
2.3.2. HSQ
2.3.3. Nanoporous Silica
2.3.4. Spin-on Polymers
2.3.5. BCB
2.3.6. Flowfill
2.3.7. CVD
2.3.8. AF4
2.3.9. PTFE
2.4. Summary
2.4.1. Processing Issues
2.4.2. Integration Issues

Chapter 3 - Lithography Issues And Trends

3.1. Optical Systems
3.1.1. Introduction
3.1.2. Step-and-Repeat Aligners
3.1.3. Deep Ultraviolet (DUV)
3.2. EUV
3.5. Nano-Imprint Lithography
3.4. X-Ray Lithography
3.3. Electron Beam Lithography
3.4. Ion Beam Lithography

Chapter 4 - CMP Issues and Trends

4.1. Need for Planarity
4.1.1. Lithography
4.1.2. Deposition
4.1.3. Etching
4.2. Applications
4.2.1. Dielectrics
4.2.2. Metals
4.3. Planarization Techniques
4.3.1. Local Planarization
4.3.1.1. Deposition-Etchback
4.3.1.2. ECR
4.3.1.3. Oxide Reflow
4.3.1.4. Spin-on-Glass
4.3.1.5. TEOS-Ozone
4.3.1.6. Laser
4.3.2. Global Planarization
4.3.2.1. Polymer
4.3.2.2. Polyimide
4.3.2.3. Isotropic Etch
4.3.2.4. Spin Etch Planarization
4.3.2.5. Electropolishing
4.4. Chemical Mechanical Polishing (CMP)
4.4.1. Background
4.4.2. Research Efforts
4.4.3. Advantages and Disadvantages
4.4.4. Process Parameters
4.4.4.1. STI Planarization
4.4.4.2. Copper CMP
4.4.4.3. Low-K Integration
4.4.4.4. Defect Density
4.4.4.5. Metrology
4.4.5. Device Processing Parameters
4.4.5.1. Memory Devices
4.4.5.2. Logic Devices

Chapter 5 - Factory Automation Issues and Trends

5.1. Introduction
5.2. Elements of Automation
5.2.1. Tool Automation
5.2.2. Intrabay Automation
5.2.3. Interbay Automation
5.2.4. Material-Control System
5.3. Flexible Automation
5.4. Reliability
5.5. Tool Issues and Trends
5.5.1. Flexible Tool Interface
5.5.2. Vacuum Robotics
5.5.3. AGV
5.5.4. Robot Control Systems
5.5.5. 300-mm Wafer Transport
5.5.6. Mini-Environments and Cleanroom Issues
5.6. E-Manufacturing

Chapter 6 - Thin film Deposition Issues and Trends

6.1. Physical Vapor Deposition
6.1.1. Sputtering Technology
6.1.2. Plasma Technology
6.1.3. Reactor Designs
6.1.3.1. Long-Throw Deposition
6.1.3.2. Collimated Sputter Deposition
6.1.3.3. Showerhead Deposition
6.1.3.4. Ionized PVD
6.1.4. Semiconductor Processing
6.1.4.1. Feature Patterning
6.1.4.2. Gap Fill
6.2. Chemical Vapor Deposition (CVD) Techniques
6.2.1. APCVD
6.2.2. LPCVD
6.2.3. PECVD
6.2.4. HDPCVD
6.2.5. ALD
6.2.5.1. Gate Dielectrics
6.2.5.2. Gate Electrodes
6.2.5.3. Metal Interconnects
6.2.5.4. Diffusion Barriers
6.2.5.5. DRAM

Chapter 7 - Plasma Etching Issues and Trends

7.1. Introduction
7.2. Processing Issues
7.2.1. Chlorine Versus Fluorine Processes
7.2.2. Multilevel Structures
7.2.3. New Metallization Materials
7.2.4. GaAs Processing
7.3. Plasma Stripping
7.3.1. Photoresist Stripping
7.3.2. Low-K Removal
Chapter 8 - Chemicals and Materials Issues and Trends
8.1. Technology Issues
8.1.1. Acids and Solvents
8.1.2. Resists
8.2. Purity Requirements
8.2.1. Purification Methods
8.2.1.1. Trends For Purity - Trace Elements
8.2.2. Particulates
8.2.1.1. Effects on Yield
8.2.1.2. Particulate Removal Techniques
8.2.1.3. Particle Monitoring
8.3. Chemical Management
8.3.1. Introduction
8.3.2. Chemical Usage Reduction
8.4. Gases
8.4.1. Requirements
8.4.1.1. Purification Alternatives
8.4.2. Particulate Considerations
8.4.2.1. Particle Monitoring
8.4.2.2. Filtration Methods
8.4.3. Summary
8.5. Sputtering and Evaporation Materials
8.5.1. Technology Issues
8.5.2. Purity Requirements
Chapter 9 - Metrology
9.1. Defect Review/Wafer Inspection
9.1.2. Defect Review
9.1.2.1. SEM Defect Review
9.1.2.2. Optical Defect Review
9.1.2.3. Other Defect Review
9.1.3. Patterned Wafer Inspection
9.1.3.1. E-Beam Patterned Wafer Inspection
9.1.3.2. Optical Patterned Wafer Inspection
9.1.4. Unpatterned Wafer Inspection
9.1.5. Macro-Defect Inspection
9.2. Thin Film Metrology
9.2.1. Metal Thin-Film Metrology
9.2.2. Non-Metal Thin-Film Metrology
9.2.3. Substrate Metrology
9.3. Lithography Metrology
9.3.1. Overlay
9.3.2. CD
9.3.3. Mask (Reticle) Metrology/Inspection
Chapter 10 - Market Forecast
10.1. Market Drivers
10.1.1. Semiconductor Market
10.1.2. Technical Trends
10.1.3. Economic Trends
10.1.4. Geographic Trends
10.1.4.1. China
10.1.4.2. Asia
10.1.4.3. Europe
10.1.4.4. Japan
10.1.4.5. United States
10.2. Market Forecast Assumptions
10.3. Low-K Market
10.4. Lithography Market
10.5. CMP Market
10.5.1. CMP Polisher Market
10.5.2. CMP Slurry Market
10.6. Factory Automation Market
10.7. Thin Film Deposition Market
10.7.1. Chemical Vapor Deposition Market
10.7.2. Physical Vapor Deposition Market
10.8. Plasma Etching Market
10.9. Chemical and Materials Market
10.9.1. Forecast by Chemical and Material
10.9.2. Market Shares
10.10. Metrology Market
FIGURES
2.1: Interconnect Delay for Copper/Low-K
3.1: Lithography Options For MPUs/DRAMs
3.2: Lithography Options For Flash
3.3: Illustration of Stepper Exposure System
3.4: Lens Arrangement For Submicron Features
3.5: Excimer Laser Evolution
3.6: EUV Lithography
3.7: Thermoplastic Nanoimprint Lithography Process
3.8: Step And Flash Nanoimprint Lithography Process
3.9: Illustration of X-Ray Lithography
3.10: Schematic Of Scalpel Electron Beam System
3.11: Multi-Source E-Beam Lithography
3.12: Ion Projection Lithography System
4.1: Planarization Lengths of Various Methods
4.2: Normalized Removal Rates
4.3: Reduced Complexity With Copper
4.4: Copper Loss From CMP
4.5: CMP Copper Process Technologies
4.6: CMP Performance Improvements
4.7: Polish Endpoint Control
5.1: Material-Control System
5.2: Traditional and Flexible Automated Material Handling System
5.3: Overhead Monorail Delivery - Cassette in Box, Cassette in SMIF Pod
5.4: Stocker Design and Interfaces
5.5: Layout Of a 45nm 300mm Fab
5.6: Interfaces To Factory Automation Systems
6.1: Schematic Of Sputtering System
6.2: Magnetron Sputtering Design
6.3: Showerhead Reactor Design
6.4: Ionized PVD
6.5: APCVD Reactor
6.6: Tube CVD Reactor
6.7: HDPCVD Reactor
6.8: ALD Versus PVD Copper Barrier
7.1: Various Enhanced Designs (a) Helicon, (b) Multiple ECR, (c) Helical Resonator
7.2: Schematic of Inductively Coupled Plasma Source
7.3: Schematic of the HRe Source
7.4: Schematic of the Dipole Magnet Source
7.5: Schematic of Chemical Downstream Etch
7.6: Silicon Trench Structure
7.7: Dual Damascene Dielectric Etch Approaches
8.1: Relationship Between Device Yield and Particles
8.2: Relationship Between Die Yield and Chip Size
8.3: Chemical Management Services Tasks
8.4: ITRS Roadmap
8.5: Gate-Last Approach
8.6: Gate-First Approach
9.1: Spectroscopic Ellipsometry Diagram
9.2: ITRS Overlay Technology Roadmap
9.3: Illustration Of 3D Structure
9.4: ITRS Metrology Roadmap
9.5: Illustration Of 3D Structure
10.1: Low-K Deposition Market Shares
10.2: Worldwide Lithography Market Shares
10.3: Semiconductor Equipment Utilization
10.4: Market Shares of Automated Wafer Transfer Suppliers
10.5: Worldwide MCVD Market Shares
10.6: Worldwide DCVD Market Shares
10.7: Worldwide PVD Market Shares
10.8: Worldwide Market Shares for Dry Etch Equipment
10.9: Distribution of Etch Sales by Type
10.10: Worldwide Market Shares of Liquid Chemical Suppliers
10.11: Worldwide Market Shares of Photoresist Suppliers
10.12: Worldwide Market Shares of Silicon Wafer Suppliers
10.13: Worldwide Market Shares of Gas Suppliers
10.14: Total Metrology Market Forecast
10.15: Total Metrology Market Shares
TABLES
2.1: Low-K Material Requirements
2.2: Low-K Materials
3.1: Wavelength “Generations”
3.2: Characteristics of X-Ray Systems
4.1: Levels of Integration of Dynamic Rams
4.2: Interconnect Levels of Logic Device
4.3: Typical Process Specifications
4.4: Organic Polymers for IMD Applications
4.5 : CMP Process Variables
4.7: Optimized CMP and Post-CMP Clean Parameters
4.8: Interconnect Materials by Segment
5.1: Evolution Of Factory Metrics
7.1: Silicon Wafer Usage
7.2: Plasma Source Comparison
7.3: Typical Process Specifications
7.4: Dry Resist Stripping Systems
8.1: Common Wafer Processing Chemicals
8.2: Photoresist Stripping Solutions
8.3: Potential Hazards of Processing Gases
9.1: Comparison Of White-Light With Multiple-Angle Laser Ellipsometry
10.1: Worldwide Capital Spending
10.2: Worldwide GDP
10.3: Worldwide Market Forecast Low-K Market
10.4: Worldwide Stepper Market
10.5: Worldwide CMP Polisher Market
10.6: Worldwide CMP Market Shares
10.7: Worldwide CMP Slurry Market
10.8: Worldwide Forecast of Automated Transfer Tools
10.9: Worldwide CVD Market Forecast
10.10: Worldwide PVD Market Forecast
10.11: Worldwide Market Forecast of Plasma Etching Systems
10.12: Worldwide Forecast of Chemicals and Materials
10.13: Total Metrology Market Forecast

Date of Publication:
Feb 2, 2018
File Format:
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