Interconnect Components

US$2,495.00
Date of Publication: Oct 18, 2017
This report discusses the packaging trends for higher performance and density driving advanced packaging technology solutions for mobile and IoT applications. One of the key enabling technologies to achieve these goals is thin 3D-packaging with integration. Developments have lately been made with various embedding technologies, such as eWLB/Fan out WLP and embedded devices. Higher integration levels and lower profiles are also achieved with wafer-level processes, at which most R&D is concentrated in the commercialization of 2.5D IC´s (with silicon interposer) & 3D ICs, as well as coreless substrate. Furthermore, there is tremendous pressure to decrease overall package height even with the additional dies stacking through innovation in wafer thinning, TSV, and ultrathin interconnects.

US$160.00
Date of Publication: Jun 15, 2015
Each year, a new slew of terms and definitions become common place in the manufacturing process. To meet these needs, IPC-T-50 Revision M, Terms and Definitions for Interconnecting and Packaging Electronic Circuits, delivers users the most up-to-date descriptions and illustrations of electronic interconnect industry terminology. It is a dynamic standard that adapts to the industry to provide the most thorough dictionary in the industry.

US$3,950.00
Date of Publication: Oct 25, 2016
Investigating the effect new and innovative technology has, or will have, on the electronic interconnect industry is covered in this new research report,...

US$600.00
Date of Publication: Oct 6, 2016
This research report presents shipment value forecast and recent quarter review of the Taiwanese IC packaging and testing industry. Companies surveyed in this research are contract manufacturers focusing on IC packaging and testing for IC suppliers around the world. The content of this report is based on primary data obtained through interviews, and publicly available information such as corporate financial statements. 

US$2,200.00
Date of Publication: Oct 1, 2015
Presently, the high-end relay market in China is principally monopolized by foreign brands such as Omron, Panasonic and TE Connectivity, while the low-end market is controlled by local Chinese players like Hongfa Technology, Dongguan Sanyou Electrical Appliances, Zhejiang HKE, Ningbo Forward Relay and Guizhou Space Appliance.

US$4,500.00
Date of Publication: Jul 25, 2015
Three-Dimensional (3D) Through-Silicon-Via (TSV) technology is steadily gaining importance as a highly-advanced semiconductor packaging model that dramatically improves chip performance and functionality. 3D TSV devices possess stacked silicon wafers interconnected vertically by employing TSVs. The 3D TSV devices offer numerous benefits in wafer/chip assembly, which include superior performance as compared to conventional techniques, reduction in package size, heterogeneous integration, and superior performance. Driven by the growing demand for innovative, high-performance chip architectures featuring benefits such as superior performance, power consumption and form factor features, 3D TSV technology is making robust progress in the semiconductor industry.

US$3,995.00
Date of Publication: Feb 13, 2015
The so-called “interconnect bottleneck is creating opportunities for optical device and cable makers or all kinds. Process scaling, power consumption and operating frequency have all need to move away from metal interconnects and into the optical realm.  This need is increasing with each new node; in high performance processors with metal tracks, clock distribution alone can use up to 50% of total chip power.